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Chip Design Authors: Jason Bloomberg, Trevor Bradley, David Strom

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DVCon 2015 Announces Advanced Program; Registration Open

The 2015 Design and Verification Conference (DVCon) Advanced Program is now available online and registration is open. DVCon, sponsored by Accellera Systems Initiative, will be held March 2-5, 2015, at the DoubleTree Hotel in San Jose, California.

Accellera Day will be held Monday, March 2 and will include sessions on SystemVerilog design, SystemC design, and low power, as well as a luncheon topic, “What is needed to Drive Design Efficiency?”

The program includes a keynote address, “Smart Design from Silicon to Software,” by Dr. Aart de Geus, chairman and co-CEO of Synopsys, on Tuesday, March 3 at 1:30 p.m. There will be two panel sessions held on Wednesday, March 4: “Art or Science” at 8:30 a.m. and “SystemC – Forever a Niche Player or Rising Star of Chip Design?” at 1:30 p.m.

"DVCon is a combination of engineers learning from peer professionals, getting exposure to new and innovative products, and exchanging ideas for creative solutions to improve productivity and deal with emerging challenges in design and verification of next generation SoCs – a true, multi-dimensional learning experience,” stated Yatin Trivedi, DVCon 2015 general chair.

There are numerous opportunities for peer-to-peer discussions during the conference. The Booth Crawl reception on Monday evening and Exhibits Reception on Tuesday and Wednesday evenings during the conference provide an excellent platform for attendees to network.

For the complete DVCon 2015 schedule, including a list of sessions, tutorials and sponsored luncheons and events, visit www.dvcon.org. To view the videos from the DVCon 2014 tutorials, visit http://www.accellera.org/resources/videos/.

DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. For more information about Accellera, please visit www.accellera.org. For more information about DVCon, please visit www.dvcon.org. Follow DVCon on Facebook https://www.facebook.com/DvCon or @dvcon on Twitter or to comment, please use #dvcon.

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