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Chip Design Authors: Jnan Dash, Jason Bloomberg, Trevor Bradley, David Strom

Related Topics: Datacenter Automation, PR on Ulitzer, Chip Design

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REMINDER: Media Alert: Oasys Design Systems to Exhibit at 49th Design Automation Conference With "Right Here, Right Now" Presentations

Will Demonstrate RTL Synthesis for 100-Million Gate Designs

SANTA CLARA, CA -- (Marketwire) -- 06/04/12 -- -- AT DAC BOOTH #530

Oasys Design Systems, a provider of chip design software

Will demonstrate RealTime Designer™, the first design tool for physical register transfer level (RTL) synthesis of 100-million gate designs, and offer presentations titled, "Right Here, Right Now," in Booth #530 at the 49th Design Automation Conference (DAC)

Monday-Wednesday, June 4-6, from 9 a.m.-6 p.m.

Moscone Center, South Hall, San Francisco
Visit www.oasys-ds.com for more details on Oasys and RealTime Designer.
Information about DAC can be found by visiting www.dac.com.

About Oasys Design Systems
Oasys Design Systems is a privately funded electronic design automation (EDA) software supplier with a revolutionary new platform called Chip Synthesis™, a fundamental shift in how synthesis is used to design and implement ICs larger than 20-million gates. It has attracted the support of legendary EDA leaders and its RealTime Designer™ product is in use at leading-edge semiconductor and systems companies worldwide. Corporate Headquarters is located at 3250 Olcott Street, Suite 120, Santa Clara, Calif. 95054. Telephone: (408) 855-8531. Facsimile: (408) 855- 8537. Email: [email protected]. For more information, visit: www.oasys-ds.com.

RealTime Designer and Chip Synthesis are trademarks of Oasys Design Systems. All other trademarks and registered trademarks are the property of their respective owners.

For more information, contact:
Nanette Collins
Public Relations for Vennsa
(617) 437-1822
Email Contact

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