A monolithic semiconductor substrate

Chip Design Journal

Subscribe to Chip Design Journal: eMailAlertsEmail Alerts newslettersWeekly Newsletters
Get Chip Design Journal: homepageHomepage mobileMobile rssRSS facebookFacebook twitterTwitter linkedinLinkedIn


Chip Design Authors: Jason Bloomberg, Trevor Bradley, David Strom

Related Topics: Chip Design, Intellectual Property in Silicon Valley

News Feed Item

MoSys Demonstrates Interoperability of its Bandwidth Engine® IC at DesignCon 2012

MoSys, Inc. (NASDAQ: MOSY):

Who:

   

MoSys (NASDAQ: MOSY), a provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is exhibiting at DesignCon 2012 in booth 615. MoSys will demonstrate interoperability between its Bandwidth Engine® IC and the newest 28nm FPGAs from both Altera Corporation and Xilinx, Inc.

 

What:

DesignCon is renowned as being the premier event for the semiconductor and electronic design engineering community. DesignCon 2012 is no exception. It is the largest meeting of board designers and is the only event to address chip design engineers’ chip/system/package challenges. It is the place for this community to network, identify solutions to immediate design challenges, and meet in person the solution providers for your next project. DesignCon brings together engineers, suppliers, analysts and media from across the globe, including Asia and the Pacific Rim. DesignCon’s exhibit floor offers the semiconductor and electronic design engineering communities a place to showcase their latest technological advancements and product developments.

 

When:

DesignCon 2012 begins January 30, 2012 and concludes February 2, 2012. The exhibition takes place on January 31 and February 1, 2012.
 

Where:

Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, CA 95054
 

About MoSys, Inc.

MoSys, Inc. (NASDAQ: MOSY) is a provider of high-performance networking memory solutions and high-speed, multi-protocol serial interface intellectual property (SerDes IP). MoSys' leading edge Bandwidth Engine® ICs combine the company's patented 1T-SRAM® high-density memory with its SerDes IP and are initially targeted at providing breakthroughs in bandwidth and access performance in next generation networking systems. MoSys' SerDes IP and DDR3 PHYs support a wide range of data rates across a variety of standards, while its 1T-SRAM memory cores provide a combination of high-density, low-power consumption, high-speed and low cost advantages for high-performance applications. MoSys is headquartered in Santa Clara, California. More information is available on MoSys' website at www.mosys.com.

MoSys, 1T-SRAM and Bandwidth Engine are registered trademarks of MoSys, Inc. in the US and/or other countries. The MoSys logo is a trademark of MoSys, Inc.

More Stories By Business Wire

Copyright © 2009 Business Wire. All rights reserved. Republication or redistribution of Business Wire content is expressly prohibited without the prior written consent of Business Wire. Business Wire shall not be liable for any errors or delays in the content, or for any actions taken in reliance thereon.