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SuVolta Promises to Halve Chip Power Consumption

Stealth Start-Up Reportedly Backed by Bechtholshiem

A stealth start-up called SuVolta that reportedly got initial funding from Sun co-founder Andy Bechtolsheim and now has Sun co-founder Bill Joy on its board in his capacity as a partner in Kleiner Perkins, one of its VCs, reared its head for the first time publicly Monday and said it can cut the power a processor needs in half without cutting its performance by plugging leaky transistors.

It's supposed to do wonders for the battery life of tablets and cellphones without requiring any of the pricey retooling that Intel's similarly intended 3-D transistor scheme will take.

SuVolta's got a proof-of-concept kinda licensing deal with Fujitsu Semiconductor Ltd to commercialize its PowerShrink low-power CMOS widgetry. Licensing's the way this thing's gonna play out.

ARM is keeping a watching brief since the widgetry can be applied to processors, SRAMs and SoCs.

Fujitsu and SuVolta, which have reportedly been working together since 2009, figure it'll take them until the second half of next year to turn out a high-volume product. They've verified the technology and begun joint development.

Fujitsu means to make the widgetry available in its 65nm parts. Power reductions are supposed to be hard beyond 90nm because it's hard to reduce the variations in the voltage in the little tiny transistors.

SuVolta says it's figured out a way to reduce the impact of fluctuations in dopant distribution - a major factor in transistor threshold voltage variability - and lower the supply voltage, which in turn reduces power consumption in CMOS devices. It figures it can cut supply voltage by 30% without any speed degradation and get a 50% reduction in active power consumption.

It also says it can reduce leaky power consumption by 80% or more.

It uses the same planar CMOS structure as conventional technology and is compatible with Fujitsu's existing fab infrastructure so Fujitsu is figuring on being able to mass-produce its Application-Specific Standard (ASSP), ASIC and Customer Owned Tooling (COT) products with the SuVolta technology.

Chip groupie Nathan Brookwood says "SuVolta's novel transistor design reduces power by a factor of two without shrinking the size of the transistor. This enables a mature 65nm process to deliver performance-per-watt characteristics comparable to advanced 32nm processes. SuVolta's innovation should appeal especially to semiconductor suppliers who want to reduce the power their chips consume, or to increase performance within a fixed power budget, but don't need the higher transistor density a smaller process geometry enables. While some argue that the industry must move to 3-D transistor structures now, SuVolta shows that rumors of the death of the planar transistor have been greatly exaggerated."

SuVolta got started in 2006 under the name DSM Solutions but abandoned the technique DSM was using because it was too pricey to manufacture. It was refocused in 2009 and its name changed.

It's gotten around $47.95 million from VCs like Kleiner, August Capital and NEA. It's looking for people.

More Stories By Maureen O'Gara

Maureen O'Gara the most read technology reporter for the past 20 years, is the Cloud Computing and Virtualization News Desk editor of SYS-CON Media. She is the publisher of famous "Billygrams" and the editor-in-chief of "Client/Server News" for more than a decade. One of the most respected technology reporters in the business, Maureen can be reached by email at maureen(at)sys-con.com or paperboy(at)g2news.com, and by phone at 516 759-7025. Twitter: @MaureenOGara

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