A monolithic semiconductor substrate

Chip Design Journal

Subscribe to Chip Design Journal: eMailAlertsEmail Alerts newslettersWeekly Newsletters
Get Chip Design Journal: homepageHomepage mobileMobile rssRSS facebookFacebook twitterTwitter linkedinLinkedIn


Chip Design Authors: Jnan Dash, Jason Bloomberg, Trevor Bradley, David Strom

Related Topics: Chip Design

News Feed Item

ASML Brion Reaches Computational Lithography Agreement with Toshiba Corporation

Brion Technologies has reached a preferred supplier agreement with Toshiba Corporation to implement a comprehensive suite of computational lithography products for Toshiba’s 3X nm and 2X nm node devices.

Brion’s extensive portfolio of low k1 enabling products for immersion scanner optimization will provide Toshiba substantial process window expansion through the combination of Tachyon source mask optimization (SMO) and ASML’s (NASDAQ:ASML) (Amsterdam:ASML) freeform illumination shape capability. Brion will also provide to Toshiba, Brion’s Tachyon LMC and Tachyon OPC+ for required resolution enhancement techniques. Together, these products enable Toshiba to extend the use of immersion lithography to the 2X nm node.

Meeting the advanced imaging requirements of the 2X nm node will require the effective use of increasingly complex RETs and/or Extreme Ultraviolet (EUV). Brion will provide an entire portfolio of Tachyon computational lithography products in order to select the best combination of techniques for each layer, all while minimizing lithography costs.

“Brion’s uniquely fast computational lithography technology consistently gives optimum results across the areas of process development, mask design and litho manufacturing," said Tatsuhiko Higashiki, Senior Manager of Toshiba’s Process & Manufacturing Engineering Center, Advanced ULSI Process Engineering Dept. II.

Bert Koek, senior vice president, Applications Product Group at ASML summarized: “Working together with Toshiba, ASML and Brion can extend the traditional boundaries between scanner optimization and computational lithography. In implementing holistic lithography, Toshiba will continue with ArF immersion lithography in a cost effective manner.”

“We are excited to expand our relationship with Toshiba and to help them advance their pioneering work in leading-edge semiconductors,” said Jim Koonmen, general manager of Brion. “In particular, we will work closely with the Toshiba team to deploy our LithoTuner fab computational products and demonstrate the ability to efficiently optimize each scanner in manufacturing for individual designs.”

About Computational Lithography
Computational lithography is the use of computer modeling to predict, correct, optimize and verify imaging performance of the lithography process over a range of patterns, processes, and system conditions. For an overview of computational lithography products, a video entitled “Virtual Scanning for Smarter Chips” is available on www.asml.com. Additional information on computational lithography can also be found at www.brion.com.

About ASML
ASML is the world's leading provider of lithography systems for the semiconductor industry, manufacturing complex machines that are critical to the production of integrated circuits or chips. Headquartered in Veldhoven, the Netherlands, ASML is traded on Euronext Amsterdam and NASDAQ under the symbol ASML. ASML provides systems and service to chip manufacturers at more than 60 locations in 15 countries. For more information: www.asml.com

About Brion Technologies
Brion Technologies is a division of ASML and an industry leader in computational lithography for integrated circuits. Brion’s Tachyon™ platform enables capabilities that address chip design, photomask making and wafer printing for semiconductor manufacturing. Brion is headquartered in Santa Clara, California. For more information: www.brion.com

More Stories By Business Wire

Copyright © 2009 Business Wire. All rights reserved. Republication or redistribution of Business Wire content is expressly prohibited without the prior written consent of Business Wire. Business Wire shall not be liable for any errors or delays in the content, or for any actions taken in reliance thereon.