SAN JOSE, Calif., Jan. 25, 2012 /PRNewswire/ -- Altera Corporation (NASDAQ:
ALTR) today announced its participation at DesignCon 2012. Experts from
Altera will showcase how they are solving some of the industry's most complex
design challenges through 28-nm FPGA architectural innovations and advanced
technologies that enable high-speed I/O performance, floating point DSP and
best-in-class signal integrity. Altera's participation at DesignCon includes
participation on industry panels, delivering a TechForum tutorial and
presenting nine conference papers. For more information about Altera's
participation at DesignCon visit http://www.altera.com/designcon.
(Logo: http://photos.prnewswire.com/prnh/20101012/SF78952LOGO)
When:
January 30 to February 2, 2012
Where:
Santa Clara Convention Center
Santa Clara, Calif.
Panel Discussions:
Monday, J... (more)
SAN JOSE, Calif., Jan. 26, 2012 /PRNewswire/ -- Xilinx, Inc. (NASDAQ: XLNX)
today announced participation at DesignCon 2012 in Santa Clara, from January
30 – February 2, at the Santa Clara Convention Center, Booth #732. Xilinx
Corporate Vice President, FPGA Development and Silicon Technology, Liam
Madden, will jumpstart Xilinx's activities by discussing the benefits and
drawbacks of 3D IC standards in the Why Do We Need 3D Design Standards?
panel. Xilinx industry experts will also present papers on Stacked Silicon
interposer technology and the design benefits of using the Zynq™... (more)
Vitesse Semiconductor Corporation (NASDAQ: VTSS), LeCroy Corporation and Wild
River Technology will present a jointly prepared paper titled “A Robust
method for Addressing 12Gbpsec Interoperability for High-Loss and Crosstalk
Aggressed Channels,” at DesignCon 2012 at the Santa Clara Convention Center
in Santa Clara, Calif., on Tuesday, January 31, 2012, at 2:00 p.m. local
time.
During the session, engineers involved with signal integrity design and
backplane characterization with system interoperability issues related to
crosstalk and channel loss will learn about a new methodol... (more)
While it was busy launching its new Niagara-based servers in New York
Tuesday, Sun Microsystems said it would open source the UltraSparc T1
processor that was code named Niagara. It's calling the project OpenSparc.
At this point it's more a statement of intent than a fait accompli. The
program isn't supposed to kick off until late in the first quarter after Sun
addresses key issues such as implementation and governance.
Back in 1999 Sun released its complete MicroSparc IIep design for free under
the Community Source License, also used for Java to try to make its chip
designs more p... (more)
My first encounter with Parasoft Insure++ and Parasoft Corporation was in the
mid-'90s when I was working for a small company developing parsers and
translators for languages used in semiconductor chip design. Like developers
on almost any development project, we ran into a "runaway" memory situation
-typically called "leaks," ours was more like a "flood" - that took quite a
bit of time, effort, and frank conversations to debug by hand. After that
incident, we started looking at memory debugging tools, Insure++ (in version
2.1 back then) being one of them. In the course of a dili... (more)
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